74ABT00DB Download

partno	mfr	description	Magnitude	download
74ABT00DB	PHILIPS	Philips Semiconductors [Quad 2-input NAND gate]	98k

INTEGRATED CIRCUITS 74ABT00 Quad 2-input NAND gate Product specification IC23 Data Handbook 1995 Sep 18 Philips Semiconductors Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An or Bn to Yn Output to Output skew Input capacitance Total supply current VI = 0V or VCC Outputs disabled; VCC = 5.5V CONDITIONS Tamb = 25?C; GND = 0V TYPICAL UNIT LOGIC DIAGRAM A0 B0 A1 B1 1 2 4 5 9 10 12 13 11 3 Y0 6 tPLH tPHL tOSLH tOSHL CIN ICC CL = 50pF; VCC = 5V 2.5 2.0 0.4 3 50 Y1 ns A2 B2 8 Y2 ns pF ?A VCC = Pin 14 GND = Pin 7 A3 B3 Y3 SA00360 PIN DESCRIPTION PIN NUMBER 1, 2, 4, 5, 9, 10, 12, 13 SYMBOL An-Bn Yn GND VCC NAME AND FUNCTION Data inputs Data outputs Ground (0V) Positive supply voltage PIN CONFIGURATION A0 B0 Y0 A1 B1 Y1 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC B3 A3 Y3 B2 A2 3, 6, 8, 11 7 14 LOGIC SYMBOL (IEEE/IEC) 1 & 3 Y2 2 SA00333 4 LOGIC SYMBOL 1 2 4 5 9 10 12 13 6 5 9 8 10 A0 B0 A1 B1 A2 B2 A3 B3 12 11 13 Y0 Y1 Y2 Y3 SF00004 VCC = Pin 14 GND = Pin 7 3 6 8 11 SA00334 FUNCTION TABLE INPUTS A L L H H NOTES: H = High voltage level L = Low voltage level B L H L H OUTPUT Y H H H L ORDERING INFORMATION PACKAGES 14-Pin Plastic DIP 14-Pin plastic SO 14-Pin Plastic SSOP Type II 14-Pin Plastic TSSOP Type I TEMPERATURE RANGE ?40?C to +85?C ?40?C to +85?C ?40?C to +85?C ?40?C to +85?C OUTSIDE NORTH AMERICA 74ABT00 N 74ABT00 D 74ABT00 DB 74ABT00 PW NORTH AMERICA 74ABT00 N 74ABT00 D 74ABT00 DB 74ABT00PW DH DWG NUMBER SOT27-1 SOT108-1 SOT337-1 SOT402-1 1995 Sep 18 2 853-1809 15755 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 DC output current Storage temperature range VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING ?0.5 to +7.0 ?18 ?1.2 to +7.0 ?50 ?0.5 to +5.5 40 ?65 to 150 UNIT V mA V mA V mA ?C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150?C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 ?40 PARAMETER LIMITS MIN 4.5 0 2.0 0.8 ?15 20 5 +85 MAX 5.5 VCC UNIT V V V V mA mA ns/V ?C DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25?C MIN VIK VOH VOL II IOFF ICEX IO ICC ICC Input clamp voltage High-level output voltage Low-level output voltage Input leakage current Power-off leakage current Output High leakage current Output current1 Quiescent supply current Additional supply current per input pin2 VCC = 4.5V; IIK = ?18mA VCC = 4.5V; IOH = ?15mA; VI = VIL or VIH VCC = 4.5V; IOL = 20mA; VI = VIL or VIH VCC = 5.5V; VI = GND or 5.5V VCC = 0.0V; VO or VI 4.5V VCC = 5.5V; VO = 5.5V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; VI = GND or VCC VCC = 5.5V; One data input at 3.4V, other inputs at VCC or GND ?50 2.5 TYP ?0.9 2.9 0.35 ?0.01 ?5.0 5.0 ?75 2 0.25 0.5 ?1.0 ?100 50 ?180 50 500 ?50 MAX ?1.2 2.5 0.5 ?1.0 ?100 50 ?180 50 500 Tamb = ?40?C to +85?C MIN MAX ?1.2 V V V ?A ?A ?A mA ?A ?A UNIT NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 1995 Sep 18 3 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM MIN tPLH tPHL tOSHL tOSLH1 Propagation delay An or Bn to Yn Output to Output skew An or Bn to Yn 1 2 1.0 1.0 Tamb = +25?C VCC = +5.0V TYP 2.5 2.0 0.4 0.4 MAX 3.6 2.8 0.5 0.5 Tamb = ?40?C to +85?C VCC = +5.0V ?0.5V MIN 1.0 1.0 MAX 4.1 3.4 0.5 0.5 ns ns UNIT NOTE: 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design. AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V An, Bn VM tPHL VM tPLH INPUT OUTPUT Yn VM VM tPHL MIN SA00336 OUTPUT N same part tPLH MIN Waveform 1. Propagation delay for inverting outputs tPLH MAX tPHL MAX tOSLH tOSHL SA00381 Waveform 2. Common edge skew TEST CIRCUIT AND WAVEFORMS VCC 90% NEGATIVE PULSE VIN D.U.T. RT CL RL POSITIVE PULSE VOUT VM 10% tTHL (tF) tTLH (tR) 90% VM tW 90% VM 10% 0V 10% 0V PULSE GENERATOR tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V) Test Circuit for Outputs 10% VM = 1.5V Input Pulse Definition DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ABT 3.0V Rep. Rate 1MHz tW 500ns tR 2.5ns tF 2.5ns SH00067 1995 Sep 18 4 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 1995 Sep 18 5 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 1995 Sep 18 6 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 1995 Sep 18 7 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 1995 Sep 18 8 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 NOTES 1995 Sep 18 9 Philips Semiconductors Product specification Quad 2-input NAND gate 74ABT00 DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088?3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. ? Copyright Philips Electronics North America Corporation 1995 All rights reserved. Printed in U.S.A. (print code) Document order number: Date of release: July 1994 9397-750-04854 http://www.icinfo.net http://pdf.ecgoo.net

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